Talks and WORKSHOPS

Topics

1. From an idea to silicon with AI and MBSE

   A workflow that starts with a need expressed in natural language and turns it into requirements, architecture, design, simulation and a prototype. Based on my AI and MBSE work at IEEE LAEDC 2025 (Best Paper) and the QvIC Labs cycle.

   Engineering, product, universities and makers · Talk or workshop · 45 to 90 min

2. SysML v2 for chips and FPGA

   Where MBSE adds value in hardware: requirements, interfaces, architecture, traceability, trade studies and verification, and what should stay inside electronic design tools. SysML v2 has been a formal OMG specification since 2025.

   Systems, FPGA, ASIC and architecture · Talk or workshop · 60 to 120 min

3. A small RISC-V SoC for TinyML

   My SoC as a case study in architecture decisions under tight area and resources: a bit-serial RISC-V CPU, an INT8 MAC accelerator, external memory and a quantized classifier, closed in six SKY130 tiles and headed for the TTSKY26d shuttle.

   Students, digital design and open silicon · Talk · 45 to 60 min

4. Engineering labs that follow industry

   How MBSE connects learning objectives, skills, lab architecture and technology changes. Based on two ASEE 2024 papers on embedded-systems and mechatronics, robotics and control labs.

   Universities, faculty and curriculum teams · Talk or workshop · 60 to 120 min

5. STEM education: from school to chip

   How to build a real progression from early STEM activities to hardware design, drawing on leading EDS-ETC, the IEEE Electron Devices Society STEM program, and on EDIDT.

   Schools, teachers and STEM programs · Talk or workshop · 45 to 90 min

6. Autonomous electronics for space

   How much analysis can run locally when a system operates far from Earth with limited resources. Part of my new line in resilient electronics, FPGA and asteroid data classification.

   Engineering, space, FPGA and students · Talk or panel · 45 to 60 min

Where I have spoken

IEEE LAEDC 2025

Guadalajara, Mexico. I presented both of my papers: the AI and MBSE framework for makers (Best Paper) and the SysML 2.0 approach to cyber-resilient semiconductors.

IEEE EDS-ETC

STEM talks and workshops with the Electron Devices Society in Mexico, Costa Rica, Peru, Paraguay, Chile and several cities in Colombia.

For organizers

To prepare the session I need the audience profile, technical level, objective, format, available time and audiovisual setup. For workshops, also the software or hardware each participant will have.